Kaypro / FreHD Adaptor - Part 3

A friend from out of town was visiting so he was able to being his Kaypro II with him to we could try the Kaypro '83 FreHD SHIM adaptor.

The physical arrangement of the Kaypro II PCB (81-110-n) is very similar to the 4/83 (81-240-n) so the SHIM does physically fit.

Interestingly this Kaypro II is fully socketed so I needed to add a spacer to ensure the shim would fully clear the other chips.  I used the same machine SIL strips that I use as sockets for the ROM and Z80.  Inserting these between the SHIM and the PCB sockets worked. The higher socketed chips were well cleared and the case would still close!

Kaypro FreHD SHIM installed in a Kaypro II (81-110n)

SHIM with FreHD attached

CP/M running from the FreHD

I discovered two changes required to the SHIM to work with the Kaypro II.

The Kaypro II has a 2716 EPROM (v 2732 on the 4/83).
Pin 21 on the 2716 is VPP but on the 2732 it is A11.  The Kaypro II PCB pulls pin 21 to VCC.  Not good for ensuring the ROM is addressed properly because the SHIM expects pin 21 to be A11.
This was easy enough to handle.  I just removed the pin on the SHIM and routed A11 directly from the Z80.

With that sorted the stock ROM would boot but Kayplus reported "ROM Error".

I had seen this in the ROM when I disassembled it during the SHIM development.  The ROM does a checksum so "ROM Error" was because the full 8K was not being addressed.

This is because U60 (74LS138) on the Kaypro II has A11, A12 and A13 as inputs.
On the 4/83 only A12 and A13 are used with the unused input tied to VSS.
Also different is the sequencing of the address lines to the U60 inputs.
On the Kaypro II it is A11 (A), A12 (B) and A13 (C).  On the 4/83 it is A12 (A), A13 (B), VSS (C).

To access the full 8K I needed to connect U60 pin 13 (in addition to Pins 14 and 15) to the GAL and make a small change to the equations to generate the /OE signal for the larger ROM.

Good thing the SHIM uses a 22V10 GAL and had a couple of spare pins.

Kaypro II (81-110-n) ROM Address Decoding

Kaypro 4/83 (81-240-n) ROM Address Decoding



DL11-W SN#1014374 Repair

This board was accessible from the front panel when installed in the PDP11/04 but the values read from the receive and tramsit data registers were not as I expected.

On initial power up the receive data register would report 377 octal and the status register 200 octal.

Receiving a character from the attached terminal would change the data register.

Sending a * from the terminal should load 052 octal in the data register.  This board would display 352.

The board was also inconsistent with some characters not being recognized.

Unlike DL11-W SN#1727869 the UART on this board is a genuine M5303 and is socketed.  There is no service tag on the board so I don't know if this came from the factory socketed or has been replaced in service.

Investigating the board with a logic probe shows that the values displayed on the front panel did match the data out pins on the M5303 UART suggesting a fault with the UART.

The M5303 UART is still available from some eBay vendors (2014) but the prices are quite high.  

An alternative part is the General Instruments AY5-1013A.  There were several vendors for this part (2014) with a wide range of prices (USD3 to USD50).

I ordered two from Bulgaria for USD3.  They both worked well when installed.

The board is now operational and will send and receive characters.


DL11-W SN#1727869 Repair

When installed in the PDP11/04 this board caused bits 4, 5 and 8 on the data bus to be set for any Unibus requests. 

The schematic shows that these bits are part of the interrupt vector address.

The "stuck bits" matched the settings for S2-3, S2-6 and S2-8.

Tracking back through the schematic the fault was traced to E63 (7474 flip-flop) that was not clearing correctly leaving /Q low.  E63 was itself not the fault.

The pin 1 gate of E62 (7402 NOR gate) which clears E63 was reading 1.78 volts with no activity when it should be 5v.

Replacing E62 with a new 7402 fixed the problem.

The board is now operational and will send and receive characters.


Making ROMs with SRECORD

The Kaypro / FreHD adaptor uses a 28C256 EEPROM chip that contains multiple ROM images.  The active image is controlled by jumpers on the high address lines.
The challenge I had while doing the project was how to program the EEPROM with multiple ROM images.
The solution was the SRECORD set of utilities and specifically SREC_CAT.
The following features of SREC_CAT were used:
  • Generate a HEX file from a binary ROM file
  • Exclude the footer from the HEX file
  • Offset the load addresses in the HEX file
The following Windows command file shows srec_cat generating HEX files from three Kaypro binary ROM file and combining them together in a single HEX file that was programmed into the 28C256.
@echo off
echo Make Combined Kaypro ROM
del 81-232.HEX
del TROM34.HEX
srec_cat roms\81-232.ROM -binary -o 81-232.HEX -intel -disable=footer
srec_cat roms\KPLUS83.ROM -binary -offset 0x2000 -o KPLUS83.HEX -intel -disable=footer
srec_cat roms\TROM34.ROM -binary -offset 0x4000 -o TROM34.HEX -intel

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Contact Andrew Quinn

jaquinn@ihug.co.nz http://twitter.com/jaquinn