DECUS NOPSIG Posters

The following DECUS NOPSIG posters were produced around 1990.  I was recent given copies in perfect condition so have uploaded them to archive.org as TIFF files suitable for reprinting.

Click on each poster for the archive.org link.  The text below each poster is written on the back of the originals.

The NOP SIG is dedicated to the retention, restoration and running of Nostalgic, Obsolute Products (NOP's).

Eight generations of PDP-8 computer architecture have come between the PDP-8 of 1965 and the DECmate III of 1985.  The PDP-8 was the original minicomputer that set DEC on the road to fame and fortune. It has been re-implemented every few years in newer technology.

  • 1965 - PDP8
  • 1968 - PDP8/I
  • 1970 - PDP8/E
  • 1974 - PDP8/A
  • 1977 - VT78
  • 1980 - DECmate I
  • 1982 - DECmate II
  • 1985 - DECmate III

This PDP-8 is on display in DEC's Australian museum.  It was sold with 6,14 bytes of mrmory and a teletype for $18,000.  The DECmate III shown has 98,304 bytes of memory, 800,000 bytes of disk and sells for 25% of the above.

No 1 in a series.

The DECUS NOP SIG is dedicated to the retention, restoration and running of Nostalgic Obsolete Products. (NOP's).

Twenty one years of Unix* software is represented here, between the PDP-7 of 1967 and the VAXstation 2000 of 1988.

The PDP-7 was the original computer on which Ritchie and Thompson wrote the UNIX* operating system at Bell Labs in 1967.

The VAXstation 2000 sitting on the butterfly table of the PDP-7 is running the Ultrix operating system.  It is showing 12 windows simultaneously.  This PDP-7, serial No. 60, was the third DEC computer to enter Australia.  It was installed at the Australian Atomic Energy Commission, Lucas Heights, on 27 January, 1966 and run for 14 years, clocking up 111,577 hours.  The PDP-7 was an eighteen bit machine with a cycle time of 1.75 microseconds.  It was notable for the solidity of its construction and for its weight-just over a half a ton!  It sold with 4096 words of memory and a teletype for $45,000. 

The VAXstation 2000 has 500 times the memory and sells for one quarter of that price.  This PDP-7 is on display in DEC's Australian Museum.

No. 2 in a series.

*UNIX is a trademark of Bell Labs

The DECUS NOP SIG is dedicated to the retention, restoration and running of Nostalgic Obsolete Products. (NOP's).

The poster was made by the DECUS NOP SIG to mark the 20th anniversary of the PDP-11 in 1990.

The poster shows three generations of the PDP-11.  On the right are two of the original PDP-11/20 computers mounted in the same cabinet.  The PDP-11/20 was released in 1970.  These units were used by the CSIRO to control an X-RAY diffractometer.  In front is an ASR-33 teletype.  In the middle is the PDP-11E10 of 1973 vintage.  

This was the first "packaged" system ever sold by Digital.  It comprised a PDP-11/10 central processor with 16,192 words of core memory, bootstrap, 2.4 Megabyte cartridge disk, dual magnetic cassettes and LA30 DECwriter console, all installed in a 6 foot cabinet.  This unit also had the LPS laboratory peripheral unit.  The package configuration saved 25% over the sum of the parts.  It was installed at the Preston Institute of Technoloy in 1974.  On the left is the top of the line PDP-11/70 of 1975 with console and expander cabinet.  This PDP-11/70 was the first RSTS/E machine installed in-house by Digital Australia - the famous node SNOE01.  These units are on display in DEC's Australian Museum.

No. 3 in a series.

The DECUS NOP SIG is dedicated to the retention, restoration and running of Nostalgic Obsolete Products. (NOP's).

After it was launched in October 1977, the VAX-11 / 780 quickly became the performance standard against which all following computers were measured.

The VAX-11 / 780 was rated as one VUP (VAX Units of Performance).  Even today, when the industry uses a benchmark known as SPECmarks, (issued by the Systems Performance Evaluation Co-operative), the VAX-11 / 780 is the reference point for one SPECmark.

 

Northstar Horizon Repair

In mid 2015 I was lucky enough to acquire a Northstar Horizon computer from a fellow collector who was disposing of his equipment.  

After seeing my father work with MDL (MicroProcessor Developments Limited of Pah Road, Auckland, New Zealand) S-100 bus machines at the Auckland University Medical School back in the early 1980's, I had always wanted to restore an S-100 bus machine.  

It may also have been something to do with this guy who appeared frequently in Byte Magazine in 1979 - having gear like that to write software sounded so cool back in 1979!

Shugart MiniFloppy Advertisement from Byte July 1979 - featuring a Northstar Horizon

I believe that this Northstar Horizon was used by the New Zealand Northstar agents "Anderson Digital Equipment" as a support/test machine. It is in stock Horizon configuration with a ZPB Z80 CPU board, HRAM-64 Dynamic Memory board and MDS Floppy Disk Controller board.  It came with a large pile of manuals with "Anderson Digital Equipment" labels.  Only a single floppy disk drive is installed in the case and a small panel with a push button and switch is installed where the second drive would normally be.  

The Northstar Horizon with the ZPB Z80 CPU board in the extender....

Tracing the wiring showed that the push button was an extension of the back panel reset switch.  For a test machine that would make sense being a lot easier to access.

The switch is used to enable or disable the PROM option installed on the Z80 CPU board.  The installed PROM was a 2708 containing the Northstar HDT "Horizon Debug Tool" monitor program.  With the switch in "PROM Enabled" position the machine would boot into the HDT monitor and in "PROM Disabled" it would attempt to execute boot code at 0xE800.  In a Northstar this is commonly the boot code of the MDS Floppy Disk Controller. I know all this now... but it took some time to get there.  

ZPB Z80 CPU, HRAM-64 and MDS Floppy Controller Boards in the Northstar Horizon

The first test step was to confirm the main power supply worked.  I had no idea if this was in 110V or 240V configuration or the state of the large capacitors.  Reforming the capacitors and then slow powerup with a variac confirmed that the power supply worked and the transformer was wired for 240V.  That was the easy part.....

Powering up the Horizon with only the Z80 CPU board installed (the documentation said that the HDT ROM did not require RAM on the machine.) and a terminal connected to the left serial port (commonly the console) I expected some activity on the terminal but got nothing.  

The first check was to use the logic probe to check for activity on the Z80 CPU.  This showed activity on /MREQ and /IORQ so the Z80 wasn't dead.  Time to check the serial ports....

The Horizon serial ports are driven by two Intel 8251 UART on the motherboard.  Checking the /CS pin (pin 11) on the 8251's showed activity which I assumed would be the HDT polling the UART's for received characters.  The DTR lines (pin 24) were pulled low which is required for the 8251 to transmit data (subject to the loaded configuration).  The clock inputs into the 8251 were correct for 9600 baud.  Everything looked right.... but no output to the terminal.

At this point the Z80 seemed to be running but that was all I really knew.  There were plenty of questions:

  • Was the HDT ROM OK?
  • Did HDT really work with no RAM in the machine?
  • Was there a problem with the Z80 CPU board?  
  • Was there a problem with the Motherboard?  
  • Had I not understood the Northstar manual and got the serial configuration wrong? 

Faced with this many questions I went down the track of removing unknows.  The first was the HDT ROM.  

Having never seen HDT before I didn't really know what to expect.  Executing known code seemed a good way to start the debugging so I wrote a small text program in Z80 assembler that would send 'A' continually to the left serial port and 'B' continually to the right serial port.

Writing the code wasn't difficult but getting it onto the Z80 board was a roadblock.  The PROM option on the ZPB Z80 board uses a 2708 EPROM.  The 2708 is an early generation part and requires +5V, -5V and +12V (higher for programming).  My cheap chinese programmer (a Genius G540) won't even read a 2708 let alone program one.

I still want to solve the reading problem to get a dump of the HDT code (I can't find this archived anywhere on the net) but worked around the problem by building an adaptor for a 28C16 EEPROM. 

28C16 EEPROM in 2708 Adaptor

With the 28C16 installed I could see activity on the /CS pin (pin 11) of both 8251 which confirmed my code was reading or writing to the correct IO port and that some of the address decoding on the motherboard was working but still no output from the TxD pin (pin 19) on either.

The test code configured the 8251 to require DTR low to transmit data, checked that DTR (pin 11) was low which it was.  

Further probing of the 8251 pins showed unexpected activity on the RESET pin (pin 21) of both 8251 which sent me back to the schematics for further research.

The Northstar motherboard will reset the 8251 on first power up using the S100 Bus /POC line (bus pin 99) but can also be reset in software by writing 0x00 to Z80 IO Port 6.

I knew my software wasn't writing to IO Port 6 so I spent some time studying the motherboard schematic and checking signals with the logic probe.

  • The 8251 reset line is driven from the output a 74LS132 NAND gate at board position 8D.
  • The pin 8 output of the 74LS132 showed continuous activity.
  • The S100 /POC input to pin 9 of the 74LS132 was stable (as expected).
  • The "software controlled reset" to pin 10 of the 74LS132 showed continuous activity (not expected).
  • The "software controlled reset" is decoded by a 74LS138 at board position 9B and output on pin 15 connecting to pin 10 on the 74LS132.
  • The 74LS138 should drive pin 15 low only when the byte written to Z80 IO Port 6 is in the block 0x00 - 0x0F (which my test code was not doing).

 

74LS138 -> 74LS132 -> UART RESET

At this point I was suspecting the 74LS138 but wanted to be sure before I went to the effort of removing the motherboard from the case and heading off to the local Jaycar store to pick up a replacement part.

I connected the Saleae Logic analyser (a great tool for retrocomputing repairs) to the board and triggered on the pin 15 output going low.  

The capture shown below confirmed that the 74LS138 seemed to be at fault.  

The value on the data bus was in the range 0x00 - 0x0F the Y0 output on pin 15 should not be going low.

Note:  The rows use Northstar schematic notiation so U4 = 74LS138 A2, U5 = 74LS138 A1 and U6 = 74LS138 A0, E6 = 74LS138 G1, E5 = 74LS138 G2B and E6 = 74LS138 G2A.

Saleae Logic Analysis of 74LS138 at board position 9B

Replacing the 74LS138 stopped the activity on the 8251 RESET pins and solved the serial port problem.  After replacement and with the test code running, each serial port would send the stream of 'A' and 'B' characters.

Reinstalling the HDT ROM confirmed that also worked with the power on prompt displayed on the console.

It is quite impressive that the machine required only a single part changed.  There is a label on the motherboard suggesting the last service was in 1981.

Next step..... testing the Northstar HRAM-64 memory board.

 

Replacement 74LS138 in board position 9B

 

 

IOT for the Small Block - Part 1

There has been much written about IOT (Internet of Things..... devices that we wouldn't initially think of as computers connected to the internet.... smart thermometers, refrigerators, coffee machines, etc) and while there are some interesting, fun and possibly limited utility applications of IOT for the average apartment dweller, for those of us that live on lifestyle blocks IOT devices really can help.

This is the first in a series of posts describing how I have used an IOT device (a little computer really) that connects to my block wide WIFI network and does really useful things.

The basis for all my IOT devices to date is the BlockTECH WIFI Controller board.  

 

Assembled BlockTECH WIFI Controller v2

On my block I use the BlockTECH WIFI Controller for the following:

  • Monitoring inputs and triggering outputs when the input state changes (a smart burgler alarm - great for the workshop).
  • Automatic monitoring on/off at configured times (no need to remember when to enable the alarm).
  • Manual output control from my smart phone (switching off the electric fence before I walk out of the house so the horses, always happy to see me and their breakfast don't zap themselves).
  • Monitor bore and pump running state and chart the results (find out which neighbor has the leak that causes the shared bore to run 24 hours a day).

The BlockTECH WIFI Controller is modular and can be assembled with only the components required for the task at hand.  

  • If only monitoring then exclude the relays and drivers.
  • If you only want to control the electric fence or the front gates from your smart phone then exclude the input circuits and install a single relay.  
  • If you want to monitoring the bore and pump then exclude the relays and use a single input.

I will write a seperate posts for each showing how the board is assembled and the software configured.

 

BlockTECH WIFI Controller v3 Schematic

 

 

MS11-JP MOS Memory SN#1958348/78

The MS11-JP (M7847-DJ) is a MOS memory board for Unibus PDP11's. In the PDP11/04 I am restoring there are two fully populated boards, each with 32K words of dynamic memory.... and neither board works when accessed from the front panel.

The first board I worked on is SN#1958348/78.

Using the front panel the board did respond to read and write requests to RAM in the assigned memory block but reading data did not show the value that had just been written.  This behaviour was consistent at any address I tested.

The voltages (+5v, -5v and +12v) were correct on the dynamic RAM chips so I used a logic probe to check for activity on the dynamic RAM chips with both no front panel activity and when reading and writing to memory.  

When not attempting to access the memory using the front panel there was activity on CAS (Column Address Strobe) and RAS (Row Address Strobe) which suggested that the refresh circuit was doing something and may even be working.

Attempting to write to memory from the front panel showed activity on WR (Write) which was also expected.

What I did not see was activity on CS (Chip Select).  If CS does not go low then the chips are not selected which means the write does nothing and the read shows random data from the Unibus.

 

Working backwards from CS through the schematic shows that CS is generated by a 7440 NAND Buffer (E114).  I could see activity on the input (pins 9,10,12 and 13) but no activity on output (pin 8).

Replacing E114 with a "new" 7440 sourced from eBay (with what appears to be a 1973 date code) fixed the problem.  It is now possible to write data to RAM and read it back.  I haven't done a full RAM test yet and can't do this until I get the processor board operational.  

These notes are written with the benefit of having solved the problem. The MS11 memory board is a lot more complex than I am used to in microcomputers.  It has it's own refresh circuit independant of the processor that identifies and gives priority to processor requests.  There are also circuits for address mapping (configurable) and Unibus bus interfacing so a lot of time was spent trying to understand how the board worked.  The EK-MS11E-OP-001_Oct76 and MP00019_1104_EngrDrws_Feb78 documents were invaluable in understanding the board and eventually fixing it.

The other MS11 does not exhibit the same symptoms.  Attempts to access the board give a Bus Error.  Initial indications are that the issue is in the refresh generation circuit.  We will see.....

 

 


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